Renesas Technology Releases Varied Lineup of LSIs for TV System

06.09.2006 17:30 - Source: Renesas Technology

Tokyo, September 5, 2006 −− Renesas Technology Corp. today announced a comprehensive lineup of nine TV system LSI models enabling efficient and low-cost system implementation as development solutions for various TV systems in markets worldwide.

The product lineup and sample shipment start dates are as follows.

1.	LCD TV LSIs (3 models) : September 6, 2006 (two models), October, 2006 (one model)
2.	LCD TV digital broadcast decoder LSI (one model) : November 2006
3.	Analog broadcast decoder LSIs (two models) : September 6, 2006
4.	HDMI^*1 digital receiver LSI (one model) : October 2006
5.	Video/audio interface LSIs (two models) : September 6, 2006

< Background >

TV systems worldwide are increasingly of the flat-panel type, including LCD and PDP TVs, and the transition from analog to digital broadcasting is accelerating, as exemplified by the start of terrestrial digital broadcasting. However, the diffusion of flat-panel TVs differs from region to region throughout the world for various reasons, and different countries have also adopted different digital broadcasting formats.

At the same time, the market requires high functionality and picture quality as typified by flat-panel designs and digitalization, together with the same kind of price reduction trend for TV systems as with conventional analog TVs, and there is a strong demand for devices that enable low system costs to be achieved. A further need is to be able to carry out efficient development of TV systems suitable for various regions, and provide flexible support for the different digital broadcasting systems used in various parts of the world.

Renesas Technology has to date released a variety of LSIs for CRT and LCD TV use, including products supporting worldwide broadcasting systems, which have helped improve TV system development efficiency and reduce prices.

Now, in response to the increasing demands for improved development efficiency and lower system prices, Renesas has developed a comprehensive lineup of TV system LSIs as future TV system development solutions.

< Product Details >

The nine newly developed models meet the varied development needs of TV systems throughout the world, and will both improve system development efficiency and help to reduce system costs.

The main features of the new products are as follows.

(1)	LCD TV LSIs (3 models: R8J66610xxxBG, R8J66611xxxBG, R8A66631FP)
	In addition to providing major LCD TV signal processing functions (Y/C separation, noise reduction, De-Interlacer, data slicer, NCM^2) and a system control microcontroller, these models support PC input and HDTV (High Definition TV) compatible 1125p input, and incorporate an LVDS^3 output circuit allowing direct connection to an LCD panel or the like. The R8J66610xxxBG and R8J66611xxxBG incorporate 3-dimensional processing circuits for Y/C separation, noise reduction, and De-Interlacer enabling higher picture quality, and also include a dual-screen display function. The panel output is 10-bit LVDS output, capable of supporting not only LCD TVs but also PDP TVs. In addition, 4-Mbit flash memory and 64-Mbit SDRAM chips are included as an SiP (System in Package). The R8J66610xxxBG also incorporates a multiplex audio decoder chip as well as memory. This makes it possible to reduce the number of parts, enabling the system board to be made smaller and a low-priced system to be implemented. The R8A66631FP is suitable for TV systems in the low-price range, and provides a low-priced solution. In addition to providing major LCD TV signal processing functions (2-dimensional Y/C separation, 2-dimensional noise reduction, 2-dimensional De-Interlacer, data slicer, NCM, and so forth), the R8A66631FP has PC input and 1125p input capability. Eight-bit LVDS output or 8-bit CMOS output is supported as panel signal output. An LQFP package is used that allows an inexpensive printed circuit board to be employed, contributing to the implementation of a low-priced system. These three products support all broadcasting systems (NTSC, PAL, and SECAM) used throughout the world, as well as various interface standards (composite, component, Y/C, and so forth), facilitating the development of TV systems for various parts of the world.
(2)	LCD TV digital broadcast decoder LSI (one model: R8A66960BG)
	The R8A66960BG is a digital broadcast decoder LSI, providing single-chip implementation of an MPEG-2 video compression standard decoding function plus LCD TV functions previously performed by separate chips. In addition to an HD output single MPEG decoder, the R8A66960BG incorporates major LCD TV signal processing functions (3-dimensional noise reduction, 3-dimensional De-Interlacer, NCM, and dual-screen display), and supports 8-bit LVDS output as panel signal output. The R8A66960BG incorporates all the functions supporting Japanese ISDB-T and the U.S. ATSC digital broadcasting standard, enabling it to be used for Japanese and U.S. terrestrial digital broadcast enabled TVs.
(3)	Analog broadcast decoder LSIs (two models: R8J66650FP, R8J66650FB)
	These LSIs are used in combination with the LCD TV LSIs in (1) or (2) to implement the addition of TV system functions. For example, they facilitate the addition of functions such as a decoder for reception of analog broadcasts by a digital broadcast enabled TV, or a second decoder for providing a secondary screen display as a PiP (Picture in Picture) function. The R8J66650FP and R8J66650FB incorporate a 16-Mbit SDRAM chip as an SiP, and in addition to video signal processing functions such as 10-bit output 3-dimensional Y/C separation (for NTSC, PAL, and SECAM), include a PC input support function and switch function, enabling PDP TVs to be supported as well as LCD TVs. These products can implement high-quality digital processing of analog signals, enabling the system board to be made smaller and a low-priced system to be implemented.
(4)	HDMI digital receiver LSI (one model : R8A00016FT)
	The R8A00016FT is a receiver LSI that supports an HDMI high-speed multimedia interface connecting audiovisual devices. It provides the industry’s top level of performance, including 1080p (1125p) operation and long-distance cable operation, and an on-chip HDCP (High-bandwidth Digital Content Protection) key, plus a CEC function^*4. The CEC control and HDMI receiver function can be implemented simultaneously, enabling the development of more user-friendly applications using HDMI with a single chip.
(5)	Video/audio interface LSIs (two models: R2S11007FP, R2S11009FP)
	The R2S11007FP and R2S11009FP are LSIs that switch analog input signals (video and audio signals) from a tuner, player, or the like in a TV system. While video and audio signals have previously been switched by separate chips to prevent inter-signal interference, Renesas has employed its original technology to implement single-chip switching of audio and video signals as an industry first. The wide variety of functions of these user-friendly LSIs include D terminal detection, aspect ratio detection, output level adjustment, and a REC-out function. The R2S11007FP and R2S11009FP enable input signal switching circuitry to be simplified, significantly reducing the number of parts used. In addition, the R2S11009FP supports 1125p wide band width video input, as well as RGB UXGA class input. The R2S11007FP and R2S11009FP feature pin arrangement compatibility, and support commonality of normal and wide band width enabled sets, thereby helping to improve development efficiency.

The above-described lineup will help users improve development efficiency for various kinds of TV systems, and bring their end-products to market in a timely fashion.

Renesas Technology will continue to extend its product lineup through the ongoing development of products that meet market needs, and to provide TV system development solutions.

Notes:	1.	HDMI (High-Definition Multimedia Interface) : A digital video/audio input/output interface standard for audiovisual devices, based on the TMDS transmission technology of the widely used DVI personal computer digital interface. Drawn up chiefly by Silicon Image Inc. in December 2002.
	2.	NCM (Natural Color Matrix) is a technology developed by Mitsubishi Electric Corporation for performing setting and adjusting of screen hues by taking each color separately.
	3.	LVDS (Low Voltage Differential Signaling) : A method of transmitting a signal as a small-amplitude differential signal
	4.	CEC (Consumer Electronics Control) : A standard for implementing various kinds of one-touch operations by connecting multiple digital consumer electronics products in a bus configuration using the CEC line of an HDMI cable. For example, a TV could be turned on when the Play button is pressed on a DVD player.

* Product names, company names, or brands mentioned are the property of their respective owners.

< Typical Applications >

LCD TVs, PDP TVs, digital broadcast enabled TVs, etc.

< Prices in Japan > *For Reference

Type	Model Name	Package	Sample Price [Tax Included] (Yen)
LCD TV LSI	R8J66610xxxBG	385-ball PBGA	[4,200]
	R8J66611xxxBG	385-ball PBGA	[3,990]
	R8A66631FP	216-pin LQFP	[1,570]
LCD TV Digital broadcast decoder LSI	R8A66960BG	449-ball PBGA	[3,990]
Analog broadcast decoder LSI	R8J66650FP	216-pin LQFP	[1,470]
Analog broadcast decoder LSI	R8J66650FB	144-pin LQFP	[1,260]
HDMI digital receiver LSI	R8A00016FT	176-pin TQFP	[1,050]
Video/audio interface LSI	R2S11007FP	100-pin QFP	[460]
Video/audio interface LSI	R2S11009FP	100-pin QFP	[525]

Supplementary Information : Product Specifications
1-1: LCD TV LSI Specifications

Item	Specifications
Model name	R8J66610xxxBG	R8J66611xxxBG
Power supply voltage	1.5 V/3.3 V dual power supplies
Applicable panels	VGA to WXGA
Analog input	10-bit A/D converter x 3 channels (PC input supported)
Digital input	10 bits x 4 channels
Y/C separation	3-dimensional
De-Interlacer	3-dimensional (3:2/2:2 pull-down video signal supported)
Teletext	Ver. 1.5, 812 pages
NCM	On-chip
Multiplex audio decoder	BTSC, EIAJ, NICAM, A2 system	−
LVDS	RGB 10-bit single output
OSD	86 characters x 39 lines (16 dots x 20 lines) Alpha-blending Blinking Bordering 256 colors
Noise reduction	3-dimensional
CPU	M32C CPU core
Flash ROM	4 Mbits
External CPU interface	4-wire serial bus interface I ² C bus interface *
SDRAM	64 Mbits
Package	385-ball PBGA (31 mm x 31 mm)

* I²C bus (Inter IC Bus) is an interface specification proposed by Royal Philips Electronics of the Netherlands.

1-2: LCD TV LSI Specifications

Item	Specifications
Model name	R8A66631FP
Power supply voltage	1.2 V/3.3 V dual power supplies
Applicable panels	VGA to WXGA
Analog input	8-bit A/D converter x 3 channels (PC input supported)
Digital input	8 bits (ITU-R BT656 input x 1 channel)
Y/C separation	2-dimensional
De-Interlacer	2-dimensional
Teletext	Ver. 1.5, 10 pages
NCM	On-chip
LVDS	RGB 8-bit single output
OSD	64 characters x 39 lines (16 dots x 20 lines) Alpha-blending Blinking Bordering
Noise reduction	2-dimensional
CPU	M32C CPU core
Package	216-pin LQFP (24 mm x 24 mm)

2: LCD TV Digital Broadcast MPEG Decoder LSI Specifications

Item	Specifications
Model name	R8A66960BG
Power supply voltage	1.05 V (internal), 3.3 V (I/O, analog), 1.8 V (DDR2-SDRAM interface)
Clock	27 MHz input frequency
CPU core	32-bit CPU core (maximum operating frequency : 216 MHz)
Applicable panels	VGA to WXGA
Video decoder	MPEG-2 MP@HL ISDB-T and ATSC format supported
Audio decoder	MPEG-2 AAC (ISO/IEC 13818-7) MPEG-2 Audio Layer II MPEG-1 Compatible Part (ISO/IEC 13813-3) MPEG-1 Audio Layer I/II (ISO/IEC 11172-3) Dolby Digital ^{* 1}
Video output	LVDS RGB 8-bit single output Analog CVBS signal or Y/C signal
Audio output	IIS, SPDIF, audio ES
On-chip peripheral functions	I ² C bus interface ^{* 2} x 2 channels CSIO (clock-synchronous serial I/O) General input/output ports, interrupt controller
Memory interfaces	32-bit width DDR2-667 interface 16-bit/8-bit width NOR/NAND flash interface
Package	449-ball PBGA (27 mm x 27 mm)

*1: Dolby is a trademark of Dolby Laboratories, Inc.
*2: I²C bus (Inter IC Bus) is an interface specification proposed by Royal Philips Electronics of the Netherlands.

3: Analog Broadcast Decoder LSI Specifications

Item	Specifications
Model name	R8J66650FP	R8J66650FB
Power supply voltage	1.5 V/3.3 V dual power supplies
Analog input	85 MHz A/D converter x 3 channels 27 MHz A/D converter x 2 channels	85 MHz A/D converter x 3 channels
Digital input/output	ITU-R BT601 (8/10/16/20 bits) ITU-R BT656 (8/10 bits) Y/Cb/Cr (24/30 bits) G/B/R (24/30 bits) 2 systems allocatable to 10 ports	ITU-R BT601 (8/10/16/20 bits) ITU-R BT656 (8/10 bits) Y/Cb/Cr (24/30 bits) G/B/R (24/30 bits) 2 systems allocatable to 10 bits x 6 ports, 8 bits x 1 port
Y/C separation	3-dimensional (NTSC/PAL)
VBI decoder	On-chip
CPU interface	CSI0
SDRAM	16 Mbits
Package	216-pin LQFP (24 mm x 24 mm)	144-pin LQFP (20 mm x 20 mm)

4: HDMI Digital Receiver LSI Specifications

Item	Specifications
Model name	R8A00016FT
Power supply voltage	3.3 V/1.8 V
Package	176-pin TQFP (20 mm x 20 mm)

5: Video/Audio Interface LSI Specifications

Item		Specifications
Model name		R2S11007FP	R2S11009FP
Power supply voltage		5.0 V (Video)/9.0 V (Audio) dual power supplies
Applicable panels		VGA to WXGA (up to 750p/1125i)	VGA to UXGA (up to 1125p)
Input	Video	Component (RGB) x 4 channels Y/C x 4 channels CVBS x 6 channels
	Audio	L/R x 10 channels
Output	Video	ADC output x 2 independent channels (Component (RGB), CVBS/YC common use) Monitor output CVBS (Y+C), 1 channel each for Y and C (internal 75 W driver, 2 Vpp output) Slicer output x 1 channel
	Audio	L/R × 3 independent channels
On-chip functions	Video	On-chip SigDet circuit at Power Save mode On-chip Pre LPF (6.5 MHz/13.5 MHz/27.0 MHz/Through alternating possible) Built-in mute circuit for all output pins On-chip ADC output level adjustment circuit (independent control for each channel, ± 30%) Detection functions D terminal connection detection, L1/L2/L3 signal detection, S terminal connection detection, S2 identification, S2 bias output, SCART slow SW support, usable as output port
	Audio	On-chip power ON/OFF mute circuit Built-in VCA circuit in 1 output system Input ATT value changeable in case of small signal (3 input systems)
Package		100-pin QFP (14 mm x 20 mm), 0.65 mm pitch

Information contained in this news release is current as of the date of the press announcement, but may be subject to change without prior notice.

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Renesas Technology Releases Varied Lineup of LSIs for TV System