Tektronix Leverages Altera HardCopy II Devices to Reduce Time-to-Market of New Oscilloscope Series by 20 Percent

Altera HardCopy System Development Methodology Allows Substantial Development Time Savings

San Jose, Calif., November 18, 2008— Altera Corporation (NASDAQ: ALTR) announced today, its HardCopy^® II ASICs enabled Tektronix Inc. to reduce the development time of its latest oscilloscopes by 20 percent. Using the HardCopy II system development methodology instead of a standard-cell ASIC-based approach played a key role in Tektronix’s rapid delivery of industry-best oscilloscopes at entry-level prices, the new MSO2000 Mixed Signal and DPO2000 Digital Phosphor Oscilloscope series.

This new series provides powerful tools to simplify the debug of mixed-signal designs—including Wave Inspector^® search and navigation tools, automatic decoding of serial data buses, and unique FilterVu^™ variable low-pass filters to reduce unwanted noise from signals—all in a portable, affordable package. Altera^® HardCopy II ASICs are instrumental in implementing these capabilities, as well as performing acquisition and display functions by receiving data from the A/D, storing the data, converting the data to images, and driving the LCD.

"The HardCopy-based methodology enabled greater collaboration between our hardware and software teams, allowing us to improve our products in ways that would not have been possible with standard-cell ASICs," said Bob Bluhm, vice president, Value Scopes Product Line, Tektronix. "Using Altera’s solutions, we rapidly produced Stratix FPGA-based working products identical to the final HardCopy II ASIC-based versions, which shortened the overall development process by 20 percent. We had working prototype hardware much earlier than our previous design process allowed. This resulted in our beta release customers having access to early evaluations and providing us with valuable feedback during our development cycle. This in turn enabled us to provide oscilloscope tools that simplify the debug of mixed-signal designs to our customer base faster than our competitors."

"The HardCopy system development methodology delivers the lowest total cost and lowest risk designs," said Paul Hollingworth, senior director of the HardCopy product group at Altera. "Tektronix was able to save valuable development time by prototyping on Stratix II devices to get its system, firmware and system software ready prior to HardCopy II ASIC design handoff."

About HardCopy ASICs

The HardCopy ASIC series offers over 13M ASIC gates, 20M bits of memory, 36 high-speed transceiver channels, and over 550-MHz system performance. With one RTL design, one set of IP cores and one tool—Quartus^® II design software—Altera delivers both FPGA and ASIC implementations. Altera's HardCopy II ASIC-based system-development methodology delivers systems sooner, better and cheaper than competing solutions, enabling design teams to take their systems from prototyping into volume production much faster and with much less risk compared to standard-cell ASICs. For more information on the HardCopy ASIC series, visit www.altera.com/pr/hardcopyasics.

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